Latches and Flip-Flops

Process Guide

In steps one and two, you will build an S-R latch and then a D latch from your S-R latch, before building D flip-flop. Since you need two D latches (and therefore two S-R latches) to build a D flip-flop, I recommend the following layout strategy.

Step 1: Build an S–R latch

Build an S–R latch on yor protoboard using the following circuit diagram:

an S–R latch implemented with NOR gates

Test your S–R latch. How do you know it is storing a value?

Have the instructor or mentor sign off on your S-R latch, then build your second S-R latch copy on the right-side of your TTL.

Step 2: Build a D latch

Add the necessary gates to turn your S–R latch into a D latch. Recall that a D latch has two inputs and two outputs:

input \(D\)
The data value that should be stored in the latch
input \(C\)
The clock input. When this pin is high, the value on \(D\) is stored in the latch. If \(C\) is low, then the stored value should not change. Note that this input is sometimes called \(E\), for “enable.”
output \(Q\) G
The stored value in the latch
output \(\bar{Q}\)
The inverse of the stored value
a D latch built around an S-R latch

Test your D latch to verify that it stores the correct value, and only updates the stored value when the clock input is high.

Have the instructor or mentor sign off on your D latch before moving on to the next step.

Step 3: Drive your D latch with a clock

Connect the \(C\) input of your D latch to the clock signal on the left side of your protoboard. You should hook a logic indicator light up to the clock input so you can monitor it. Set your clock on the TTL option, square wave, and a low frequency (Hz, not KHz, and 1, not 10 or 100).

With the clock set slow enough, you should be able to watch the value on \(D\) update the latch state only when the clock is high.

What happens when you change \(D\) while \(C\) is still high?

Step 4: Build a D flip-flop

Build a second D latch and connect it to your first D latch to build an edge-triggered flip-flop. The following figure shows a D flip-flop that stores an input value on the clock’s falling edge.

Once you have completed this step, please have the instructor or a mentor sign off on your circuit.

a D flip-flop built from two D latches

Note: You cannot use a logic switch as the clock to reliably test your flip-flop. When making a transition, the contacts can “bounce” causing several edges that may be visibly undetectable to you but of real effect to the flip-flop. It is thus better to use the more reliable clock signal of the protoboard with a suitably low frequency.

Step 5: Choose Your Own Adventure

For the final step of this lab, you may choose one of the two exercises. You must complete at least one, but you do not need to complete both to earn full credit on the lab.

Once you have completed one of the options, please have the instructor or a mentor sign off on your circuit.

Option A: Clock Divider

Using a flip-flop, you can cut the frequency of a clock signal in half. Design a circuit to do this, then implement it using the flip-flop you built in step 4. If you have trouble coming up with your design, I can share a hint.

Drive the input with the protoboard’s clock input, and use logic indicators to verify that the input clock cycles twice as fast as the output clock.

Caution: There is a limit to how fast you can cycle a clock input to TTL chips and still observe the expected behavior. If you set the clock frequency too high, your flip-flop may not “settle” in its final state before the clock input changes.

Option B: Build a Simple 2x1 Register File

Using the two D latches you built for your flip-flop, implement a simple 2x1 register file (two registers, each of one bit). Your circuit should have the following inputs and outputs:

input \(A_R\)
The address of the register that should be read. This will either be \(0\) for the first D latch or \(1\) for the second D latch.
input \(A_W\)
The address of the register that should be written to.
input \(W\)
If true, writing is enabled
input \(D\)
The value that should be written to the specified register, if writing is enabled.
output \(Q\)
The value of the register specified by \(A_R\).

This circuit will require a simple decoder and multiplexor. The one bit versions of these components can be built with very few gates, so try to think up a simple implementation before building your circuit.


This lab is adapted from a lab introduced to Grinnell College by Marge Coahran and updated by Janet Davis.

The circuit diagrams are Figures B.8.1 (p. B-50), B.8.2 (p B-52), and B.8.4 (p. B-53) from

Patterson D. A. & Hennessy J. L. (2014). Computer organization and design: The hardware/software interface (5th ed.). Waltham, MA: Morgan Kaufmann.

Copyright © 2018, 2019, 2020, 2022 Marge Coahran, Janet Davis, Charlie Curtsinger, and Jerod Weinman

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