Lab: Memory Translation, Segmentation, and Paging
CSC 213 - Operating Systems and Parallel Algorithms - Weinman
- Summary:
- You will experiment with address space virtualization
via translation, segmentation and paging systems.
- Assigned:
- Tuesday 25 September
- Due:
- 10:30 PM Monday 1 October
- Objectives:
- Practice memory address translation and identifying
segmentation and page faults.
- Collaboration:
- You will do this lab in teams
as assigned by the instructor.
- Reading:
- Read the details on the three simulators you will be
using for the lab:
- Mechanism: Address Translation pp. 14-16 on relocation.pyc
- Segmentation pp. 15-18 on segmentation.pyc
- Paging: Introduction pp. 11-13 on paging-linear-translate.pyc
Exercises
Preliminaries
Do this laboratory on any MathLAN workstation. You don't need to copy
any starter files, simply change your working directory as follows.
-
$ cd ~weinman/public_html/courses/CSC213/2012F/labs/code/memory
Part A: Address Translation
- [Exploration] Run the translation simulator with seed 1:
-
./relocation.pyc -s 1
Manually check whether each virtual address generated is within bounds.
If so, compute the translation. When you are done, verify your work
with the -c flag.
- Consider the following translation scenario.
-
ARG address space size 1k
ARG phys mem size 16k
Base-and-Bounds register information:
Base : 0x00001a9a (decimal 6810)
Limit : 476
Virtual Address Trace
VA 0: 0x0000001d (decimal: 29)
VA 1: 0x0000018f (decimal: 399)
VA 2: 0x00000148 (decimal: 328)
VA 3: 0x000000bd (decimal: 189)
VA 4: 0x000001f9 (decimal: 505)
For each virtual address, either write down the physical address it
translates to or write down that it is an out-of-bounds address (a
segmentation violation).
- Run the simulator as follows:
-
./relocation.pyc -s 0 -n 10
What value must the bounds register (set with the -l flag,
(thats ell, for limit) be for all the generated virtual addresses
to be valid? Verify your answer using the simulator.
- Run the simulator as follows:
-
./relocation.pyc -s 1 -n 10 -l 100
What is the largest value the bounds register may take so that the
address space fits entirely into physical memory? (Remember that 16k=16×210.)
Part B: Segmentation
If you haven't already, be sure you study and completely understand
the small example in the segmentation reading.
- First lets use a tiny address space to translate
some addresses. Run the segmentation simulator as follows:
-
segmentation.pyc -a 128 -p 512 -b 0 -l 20 -B 512 -L 20 -s 0
- Translate the addresses (indicating the segment) or report a segmentation
violation. When you are done, verify your work using the -c
flag.
- What is the highest legal virtual address in segment 0?
- What about the lowest legal virtual address in segment 1?
- What are the lowest and highest illegal addresses in this entire address
space?
- Run segmentation.py with the -A flag to verify your
answers. (This could require eight addresses.)
- Consider the following segmentation scenario.
-
ARG address space size 128
ARG phys mem size 512
Segment register information:
Segment 0 base (grows positive) : 0x00000000 (decimal 0)
Segment 0 limit : 20
Segment 1 base (grows negative) : 0x00000200 (decimal 512)
Segment 1 limit : 20
Virtual Address Trace
VA 0: 0x00000051 (decimal: 81)
VA 1: 0x00000003 (decimal: 3)
VA 2: 0x00000023 (decimal: 35)
VA 3: 0x0000001c (decimal: 28)
VA 4: 0x0000005e (decimal: 94)
VA 5: 0x00000056 (decimal: 86)
VA 6: 0x00000072 (decimal: 114)
VA 7: 0x0000000b (decimal: 11)
VA 8: 0x00000036 (decimal: 54)
VA 9: 0x0000006c (decimal: 108)
Translate the addresses (indicating the segment) or report a segmentation
violation.
- Lets say we have a tiny 16-byte address space in
a 128-byte physical memory. Assuming an address stream from 0 to 15,
what base and bounds would you set up so as to get the simulator to
generate the following translation results: valid, valid,
violation, ..., violation, valid,
valid? That is, running the simulator as follows,
-
segmentation.pyc -a 16 -p 128 -A 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 --b0 ? --l0 ? --b1 ? --l1 ?
what should the arguments to b0, l0, b1,
and l1 be?
- Say we want to generate a problem where roughly 90% of the randomly-generated
virtual addresses are valid (i.e., not segmentation violations).
How should you configure the simulator to do so? Which parameters
are important?
Part C: Linear Paging
- How do you expect the linear page table size to change as the address
space grows?
- Test your hypothesis using the paging simulator with various address
space sizes, keeping other elements constant. For example,
-
paging-linear-translate.pyc -P 1k -a 1m -p 512m -v -n 0
- How do you expect the linear page table size to change as the page
size grows?
- Test your hypothesis using the paging simulator with various page
sizes, keeping other elements constant.
- [Exploration] Run the paging simulator as follows:
-
paging-linear-translate.pyc -P 1k -a 16k -p 32k -v -u 50
Translate the addresses (indicating the page number) or report an
invalid page number. When you are done, verify your work using the
-c flag.
- Consider the following paging scenario.
-
ARG address space size 16k
ARG phys mem size 32k
ARG page size 1k
ARG verbose True
The format of the page table is simple:
The high-order (left-most) bit is the VALID bit.
If the bit is 1, the rest of the entry is the PFN.
If the bit is 0, the page is not valid.
Page Table (from entry 0 down to the max size)
[ 0] 0x8000000d
[ 1] 0x80000016
[ 2] 0x8000001e
[ 3] 0x8000000d
[ 4] 0x8000001e
[ 5] 0x00000000
[ 6] 0x8000001e
[ 7] 0x80000019
[ 8] 0x00000000
[ 9] 0x00000000
[ 10] 0x80000016
[ 11] 0x80000004
[ 12] 0x80000019
[ 13] 0x8000001d
[ 14] 0x8000001e
[ 15] 0x8000000b
Virtual Address Trace
VA 0: 0x0000147e (decimal: 5246)
VA 1: 0x00003af7 (decimal: 15095)
VA 2: 0x0000065b (decimal: 1627)
VA 3: 0x00001766 (decimal: 5990)
VA 4: 0x0000314b (decimal: 12619)
Translate the addresses (indicating the page number) or report an
invalid page number.
What to turn in
A single pdf containing answers to all questions, except those marked
[Exploration].
- Acknowledgment:
- These exercises are adapted from those accompanying
the simulators in the Arpaci-Dusseaus' Three Easy Pieces.