Course Schedule
CSC 211 Computer Organization and Architecture Fall 2020

Note:

Skip to week: 1 2 3 4 5 6 7 Final

Week Day Date Topic Reading
1 Mon 8/31 Introduction + Lab 0 PH 1.1-1.3 pp. 2-16
Tue 9/1 Logic Gates & Karnaugh Maps PH B.1-B2, pp. B-3–B-8; NL 3A.1-3A.6 pp. 130-141
Wed 9/2 Combinational Logic PH B.3 pp. B-9–B-20
Thu 9/3 Lab 1: Combinational Logic
Fri 9/4 Binary Math PH 2.4, 3.2 pp. 73-79, 178-182
2 Mon 9/7 ALU Design PH B.5 pp. B-26–B-38
Tue 9/8 Lab 2: Build an Adder
Wed 9/9 Sequential Logic PH B.7-B.8, pp. B-48–B-58
Thu 9/10 Lab 3: Build an ALU
Fri 9/11 Memory: SRAM & DRAM PH B.9, pp. B-58–B-67
3 Mon 9/14 Assembly & Machine Language PH 2.1-2.3, 2.5-2.6 pp. 62-73, 80-89
Tue 9/15 Lab 4: Build a Register File
Wed 9/16 Making Decisions PH 2.7, pp. 90-96
Thu 9/17 Lab 5: MIPS Basics
Fri 9/18 Supporting Procedures PH 2.8, pp. 96-106
4 Mon 9/21 Strings, Addressing, & Arrays PH 2.9-2.10, 2.14 pp. 106-120, 141-145
Tue 9/22 Lab 6: MIPS Procedures
Wed 9/23 Datapath PH 4.1-4.3, pp. 242-259
Thu 9/24 Lab 7: Build a Datapath I
Fri 9/25 Control PH 4.4, pp. 259-272
5 Mon 9/28 Pipelining PH 4.5-4.6, pp. 272-303
Tue 9/29 Lab 8: Build a Datapath II
Wed 9/30 Data Hazards PH 4.7, pp. 303-316
Thu 10/1 Lab 9: Build a Datapath III
Fri 10/2 Control Hazards PH 4.8, pp. 316-325
6 Mon 10/5 Exceptions PH 4.9, A.7, pp. 325-332, A-33–A-38
Tue 10/6 Lab 10: Build a Datapath IV
Wed 10/7 Instruction-Level Parallelism PH 4.10, 4.14-4.15 pp. 332-344, 355-356
Thu 10/8 Lab 11: Build a Datapath V
Fri 10/9 Cache PH 5.1-5.4 pp. 374-411
7 Mon 10/12 Memory Hierarchy PH 5.7-5.8 pp. 427-461
Tue 10/13 Lab 12: Build a Datapath VI
Wed 10/14 Parallelism & Synchronization PH 6.1-6.3 pp. 502-515
Thu 10/15 Lab 13: Build a Cache PH 5.9 pp. 461-466
Fri 10/16 Parallel Architectures PH 6.4-6.6 pp. 516-531
F Tue 10/20 Wrap-Up HP (CACM '19) 📽
Jerod Weinman
Created 23 Jul 2020